During the fabrication of integrated circuits which have a multiplicity of MOS (Metal Oxide Semiconductor) transistors, plasma process steps are often provided as part of the fabrication process. The plasma used in a plasma process step is able to electrically charge an electrically conductive supply conductor to a gate region of a field-effect transistor and to electrically charge the gate region. The charge which accumulates on the supply conductors and in the gate region can induce localized high electric fields that lead to intense currents through the gate oxide, resulting in trap generation and population within the gate dielectric and its interface with silicon, seriously degrading the dielectric. This phenomenon is mostly pronounced during the final stages of patterning the gate conductor, which is typically polysilicon, or conductors connected to it. The trapped charges decrease breakdown voltage of the oxide (also known as gate oxide integrity, GOI) and can cause shift in the threshold voltage and current-carrying capability resulting in reliability failures.
In the prior art several methods have been employed to protect devices against plasma damages. One typical approach to protect against plasma charging damage comprises the formation of a diode connected to the polycrystalline silicon layer, i.e. the gate electrode, thereby providing a discharge path for electrical charging during plasma processing. However, the formation of such a protective diode directly connected to the gate electrode before patterning the gate requires extra masking and implant steps.